📟 Command Prompt
titus@dev:~$ cat whoami.json
{
  "name":    "Titus Soh",
  "degree":  "Computer Engineering",
  "year":    "Final Year",
  "focus":   ["Embedded Systems", "OS Dev"],
  "status":  "Seeking Software Engineering Internship"
}
titus@dev:~$ git log --oneline -4
a3f91c2 feat: RISC-V pipelined CPU in SystemVerilog
d7b04e1 feat: custom RTOS scheduler for ARM Cortex-M4
9c21fa8 fix: TCP/IP stack congestion window bug
4e88d3b init: neural net inference engine (C, SIMD)
titus@dev:~$

Computer Engineering Student

Titus
Soh.

Hardware · Systems · Software

Final-year CE student obsessed with the space between hardware and software. I build things at the metal level — from RTL design to bare-metal firmware to kernel modules.

GPA 3.42 C / C++ HTML Python Dean's List Linux Kernel
01.

Projects

⚙️

RISC-V Out-of-Order CPU

5-stage pipelined processor with Tomasulo OoO execution, branch prediction (tournament), and a 32KB L1 cache. Synthesized on Xilinx Artix-7 FPGA at 85 MHz.

SystemVerilog Vivado FPGA RISC-V ISA
🖥️

µKernel RTOS

Preemptive RTOS from scratch for ARM Cortex-M4. Features priority scheduler, mutex/semaphore primitives, memory protection units, and UART driver stack.

C ARM Assembly STM32 CMSIS
🌐

Userspace TCP/IP Stack

Implemented Ethernet, ARP, IP, ICMP, TCP, and UDP protocols from scratch using raw Linux sockets (TUN/TAP). Passes 98% of RFC compliance tests.

C Linux Sockets Wireshark RFC 793
🤖

SIMD Neural Net Engine

8-bit quantized inference engine for CNNs using AVX2 SIMD intrinsics. Achieves 3.4× speedup over baseline on ResNet-18, targeting edge deployment.

C AVX2 Python Quantization
🔒

Hardware AES Accelerator

AES-128 encryption core with support for ECB/CBC/CTR modes. Fully pipelined, 1 block/cycle throughput. Verified with 10K+ NIST test vectors.

VHDL ModelSim FPGA Cryptography
📡

Autonomous Rover

Capstone: obstacle-avoiding rover with LiDAR SLAM, PID motor control, and Raspberry Pi + STM32 dual-MCU architecture. Navigates 50m course in <90s.

C++ ROS2 Python LiDAR
02.

Skills / System Info

// languages
C / C++
95%
SystemVerilog
88%
Python
82%
ARM ASM
74%
Rust
55%
// hardware & embedded
FPGA Design
90%
MCU Firmware
88%
PCB Design
70%
Signal Analysis
75%
I2C / SPI / UART
92%
// systems & tools
Linux Kernel
78%
OS Internals
82%
Git / CI
90%
GDB / Valgrind
85%
Docker
68%
03.

Education

2014 – 2019

Rulang Primary School

GPA 3.87 / 4.0 · Dean's List (4 semesters) · Focus: Computer Architecture, Embedded Systems, VLSI Design, Operating Systems. Final Year Project: hardware-accelerated ML inference on custom RISC-V SoC.

2020 – 2023

Nan Hua High School

GPA 3.87 / 4.0 · Dean's List (4 semesters) · Focus: Computer Architecture, Embedded Systems, VLSI Design, Operating Systems. Final Year Project: hardware-accelerated ML inference on custom RISC-V SoC.

2024 – 2027

Computer Engineering

Singapore Polytechnic — School of Electrical and Electronic Engineering

Developed low-level NIC firmware in C for BCM57xxx chipsets. Optimized DMA descriptor ring logic, reducing latency by 12%. Wrote unit tests using an in-house simulation framework, achieving 89% coverage on critical paths.

Aug – Dec 2024

Undergraduate Research Assistant

NUS Computer Architecture Lab

Researched cache coherence protocols for many-core processors. Implemented MESI and MESIF protocols in a gem5 simulator, publishing results at a departmental symposium.

2023

IEEE Hackathon — 1st Place

SUTD, Singapore

Won first place for an IoT air quality sensor network with custom firmware, MQTT telemetry pipeline, and real-time visualization dashboard. Team of 4, built in 24 hours.

04.

Contact

Looking for internship or new grad roles in embedded systems, silicon engineering, or low-level software. Always up to talk compilers, hardware, or operating systems.

send_email() →
// links & handles
📄 Resume jordan_lee_cv.pdf
📍 Location Singapore · open to relocation